Model { Name "IIRorder1" Version 7.3 MdlSubVersion 0 GraphicalInterface { NumRootInports 0 NumRootOutports 0 ParameterArgumentNames "" ComputedModelVersion "1.51" NumModelReferences 0 NumTestPointedSignals 0 } SavedCharacterEncoding "ibm-5348_P100-1997" SaveDefaultBlockParams on ScopeRefreshTime 0.035000 OverrideScopeRefreshTime on DisableAllScopes off DataTypeOverride "UseLocalSettings" MinMaxOverflowLogging "UseLocalSettings" MinMaxOverflowArchiveMode "Overwrite" InitFcn "%% DSPBuilder Start\nalt_dspbuilder_update_model(bdroot)\n%% DSPBuilder End\n" Created "Mon Oct 10 11:36:59 2005" Creator "umb" UpdateHistory "UpdateHistoryNever" ModifiedByFormat "%" LastModifiedBy "New" ModifiedDateFormat "%" LastModifiedDate "Wed Mar 10 14:10:39 2010" RTWModifiedTimeStamp 0 ModelVersionFormat "1.%" ConfigurationManager "None" SampleTimeColors off SampleTimeAnnotations off LibraryLinkDisplay "none" WideLines off ShowLineDimensions off ShowPortDataTypes off ShowLoopsOnError on IgnoreBidirectionalLines off ShowStorageClass off ShowTestPointIcons on ShowSignalResolutionIcons on ShowViewerIcons on SortedOrder off ExecutionContextIcon off ShowLinearizationAnnotations on BlockNameDataTip off BlockParametersDataTip off BlockDescriptionStringDataTip off ToolBar on StatusBar on BrowserShowLibraryLinks off BrowserLookUnderMasks off SimulationMode "normal" LinearizationMsg "none" Profile off ParamWorkspaceSource "MATLABWorkspace" AccelSystemTargetFile "accel.tlc" AccelTemplateMakefile "accel_default_tmf" AccelMakeCommand "make_rtw" TryForcingSFcnDF off RecordCoverage off CovPath "/" CovSaveName "covdata" CovMetricSettings "dw" CovNameIncrementing off CovHtmlReporting on covSaveCumulativeToWorkspaceVar on CovSaveSingleToWorkspaceVar on CovCumulativeVarName "covCumulativeData" CovCumulativeReport off CovReportOnPause on CovModelRefEnable "Off" CovExternalEMLEnable off ExtModeBatchMode off ExtModeEnableFloating on ExtModeTrigType "manual" ExtModeTrigMode "normal" ExtModeTrigPort "1" ExtModeTrigElement "any" ExtModeTrigDuration 1000 ExtModeTrigDurationFloating "auto" ExtModeTrigHoldOff 0 ExtModeTrigDelay 0 ExtModeTrigDirection "rising" ExtModeTrigLevel 0 ExtModeArchiveMode "off" ExtModeAutoIncOneShot off ExtModeIncDirWhenArm off ExtModeAddSuffixToVar off ExtModeWriteAllDataToWs off ExtModeArmWhenConnect on ExtModeSkipDownloadWhenConnect off ExtModeLogAll on ExtModeAutoUpdateStatusClock on BufferReuse on ShowModelReferenceBlockVersion off ShowModelReferenceBlockIO off Array { Type "Handle" Dimension 1 Simulink.ConfigSet { $ObjectID 1 Version "1.6.0" Array { Type "Handle" Dimension 8 Simulink.SolverCC { $ObjectID 2 Version "1.6.0" StartTime "0.0" StopTime "255" AbsTol "auto" FixedStep "auto" InitialStep "auto" MaxNumMinSteps "-1" MaxOrder 5 ZcThreshold "auto" ConsecutiveZCsStepRelTol "10*128*eps" MaxConsecutiveZCs "1000" ExtrapolationOrder 4 NumberNewtonIterations 1 MaxStep "auto" MinStep "auto" MaxConsecutiveMinStep "1" RelTol "1e-3" SolverMode "SingleTasking" Solver "FixedStepDiscrete" SolverName "FixedStepDiscrete" ShapePreserveControl "DisableAll" ZeroCrossControl "UseLocalSettings" ZeroCrossAlgorithm "Nonadaptive" AlgebraicLoopSolver "TrustRegion" SolverResetMethod "Fast" PositivePriorityOrder off AutoInsertRateTranBlk off SampleTimeConstraint "Unconstrained" InsertRTBMode "Whenever possible" SignalSizeVariationType "Allow only fixed size" } Simulink.DataIOCC { $ObjectID 3 Version "1.6.0" Decimation "1" ExternalInput "[t, u]" FinalStateName "xFinal" InitialState "xInitial" LimitDataPoints on MaxDataPoints "1000" LoadExternalInput off LoadInitialState off SaveFinalState off SaveCompleteFinalSimState off SaveFormat "Array" SaveOutput on SaveState off SignalLogging on InspectSignalLogs off SaveTime on StateSaveName "xout" TimeSaveName "tout" OutputSaveName "yout" SignalLoggingName "logsout" OutputOption "RefineOutputTimes" OutputTimes "[]" Refine "1" } Simulink.OptimizationCC { $ObjectID 4 Version "1.6.0" Array { Type "Cell" Dimension 4 Cell "ZeroExternalMemoryAtStartup" Cell "ZeroInternalMemoryAtStartup" Cell "NoFixptDivByZeroProtection" Cell "OptimizeModelRefInitCode" PropName "DisabledProps" } BlockReduction on BooleanDataType on ConditionallyExecuteInputs on InlineParams off InlineInvariantSignals on OptimizeBlockIOStorage on BufferReuse on EnhancedBackFolding off StrengthReduction off EnforceIntegerDowncast on ExpressionFolding on EnableMemcpy on MemcpyThreshold 64 PassReuseOutputArgsAs "Structure reference" ExpressionDepthLimit 2147483647 FoldNonRolledExpr on LocalBlockOutputs on RollThreshold 5 SystemCodeInlineAuto off StateBitsets off DataBitsets off UseTempVars off ZeroExternalMemoryAtStartup on ZeroInternalMemoryAtStartup on InitFltsAndDblsToZero on NoFixptDivByZeroProtection off EfficientFloat2IntCast off EfficientMapNaN2IntZero on OptimizeModelRefInitCode off LifeSpan "inf" BufferReusableBoundary on SimCompilerOptimization "Off" AccelVerboseBuild off } Simulink.DebuggingCC { $ObjectID 5 Version "1.6.0" RTPrefix "error" ConsistencyChecking "none" ArrayBoundsChecking "none" SignalInfNanChecking "none" SignalRangeChecking "none" ReadBeforeWriteMsg "UseLocalSettings" WriteAfterWriteMsg "UseLocalSettings" WriteAfterReadMsg "UseLocalSettings" AlgebraicLoopMsg "warning" ArtificialAlgebraicLoopMsg "warning" SaveWithDisabledLinksMsg "warning" SaveWithParameterizedLinksMsg "none" CheckSSInitialOutputMsg on UnderspecifiedInitializationDetection "Classic" MergeDetectMultiDrivingBlocksExec "none" CheckExecutionContextPreStartOutputMsg off CheckExecutionContextRuntimeOutputMsg off SignalResolutionControl "TryResolveAllWithWarning" BlockPriorityViolationMsg "warning" MinStepSizeMsg "warning" TimeAdjustmentMsg "none" MaxConsecutiveZCsMsg "error" SolverPrmCheckMsg "warning" InheritedTsInSrcMsg "warning" DiscreteInheritContinuousMsg "warning" MultiTaskDSMMsg "warning" MultiTaskCondExecSysMsg "none" MultiTaskRateTransMsg "error" SingleTaskRateTransMsg "none" TasksWithSamePriorityMsg "warning" SigSpecEnsureSampleTimeMsg "warning" CheckMatrixSingularityMsg "none" IntegerOverflowMsg "warning" Int32ToFloatConvMsg "warning" ParameterDowncastMsg "error" ParameterOverflowMsg "error" ParameterUnderflowMsg "none" ParameterPrecisionLossMsg "warning" ParameterTunabilityLossMsg "warning" UnderSpecifiedDataTypeMsg "none" UnnecessaryDatatypeConvMsg "none" VectorMatrixConversionMsg "none" InvalidFcnCallConnMsg "error" FcnCallInpInsideContextMsg "Use local settings" SignalLabelMismatchMsg "none" UnconnectedInputMsg "warning" UnconnectedOutputMsg "warning" UnconnectedLineMsg "warning" SFcnCompatibilityMsg "none" UniqueDataStoreMsg "none" BusObjectLabelMismatch "warning" RootOutportRequireBusObject "warning" AssertControl "UseLocalSettings" EnableOverflowDetection off ModelReferenceIOMsg "none" ModelReferenceVersionMismatchMessage "none" ModelReferenceIOMismatchMessage "none" ModelReferenceCSMismatchMessage "none" UnknownTsInhSupMsg "warning" ModelReferenceDataLoggingMessage "warning" ModelReferenceSymbolNameMessage "warning" ModelReferenceExtraNoncontSigs "error" StateNameClashWarn "warning" StrictBusMsg "None" LoggingUnavailableSignals "error" BlockIODiagnostic "none" } Simulink.HardwareCC { $ObjectID 6 Version "1.6.0" ProdBitPerChar 8 ProdBitPerShort 16 ProdBitPerInt 32 ProdBitPerLong 32 ProdIntDivRoundTo "Undefined" ProdEndianess "Unspecified" ProdWordSize 32 ProdShiftRightIntArith on ProdHWDeviceType "32-bit Generic" TargetBitPerChar 8 TargetBitPerShort 16 TargetBitPerInt 32 TargetBitPerLong 32 TargetShiftRightIntArith on TargetIntDivRoundTo "Undefined" TargetEndianess "Unspecified" TargetWordSize 32 TargetTypeEmulationWarnSuppressLevel 0 TargetPreprocMaxBitsSint 32 TargetPreprocMaxBitsUint 32 TargetHWDeviceType "Specified" TargetUnknown off ProdEqTarget on } Simulink.ModelReferenceCC { $ObjectID 7 Version "1.6.0" UpdateModelReferenceTargets "IfOutOfDateOrStructuralChange" CheckModelReferenceTargetMessage "error" ModelReferenceNumInstancesAllowed "Multi" ModelReferencePassRootInputsByReference on ModelReferenceMinAlgLoopOccurrences off } Simulink.SFSimCC { $ObjectID 8 Version "1.6.0" SFSimEnableDebug on SFSimOverflowDetection on SFSimEcho on SimBlas on SimUseLocalCustomCode off SimBuildMode "sf_incremental_build" } Simulink.RTWCC { $BackupClass "Simulink.RTWCC" $ObjectID 9 Version "1.6.0" Array { Type "Cell" Dimension 1 Cell "IncludeHyperlinkInReport" PropName "DisabledProps" } SystemTargetFile "grt.tlc" GenCodeOnly off MakeCommand "make_rtw" GenerateMakefile on TemplateMakefile "grt_default_tmf" GenerateReport off SaveLog off RTWVerbose on RetainRTWFile off ProfileTLC off TLCDebug off TLCCoverage off TLCAssert off ProcessScriptMode "Default" ConfigurationMode "Optimized" ConfigAtBuild off RTWUseLocalCustomCode off RTWUseSimCustomCode off IncludeHyperlinkInReport off LaunchReport off TargetLang "C" IncludeBusHierarchyInRTWFileBlockHierarchyMap off IncludeERTFirstTime on GenerateTraceInfo off GenerateTraceReport off GenerateTraceReportSl off GenerateTraceReportSf off GenerateTraceReportEml off GenerateCodeInfo off RTWCompilerOptimization "Off" CheckMdlBeforeBuild "Off" Array { Type "Handle" Dimension 2 Simulink.CodeAppCC { $ObjectID 10 Version "1.6.0" Array { Type "Cell" Dimension 9 Cell "IgnoreCustomStorageClasses" Cell "InsertBlockDesc" Cell "SFDataObjDesc" Cell "SimulinkDataObjDesc" Cell "DefineNamingRule" Cell "SignalNamingRule" Cell "ParamNamingRule" Cell "InlinedPrmAccess" Cell "CustomSymbolStr" PropName "DisabledProps" } ForceParamTrailComments off GenerateComments on IgnoreCustomStorageClasses on IgnoreTestpoints off IncHierarchyInIds off MaxIdLength 31 PreserveName off PreserveNameWithParent off ShowEliminatedStatement off IncAutoGenComments off SimulinkDataObjDesc off SFDataObjDesc off IncDataTypeInIds off MangleLength 1 CustomSymbolStrGlobalVar "$R$N$M" CustomSymbolStrType "$N$R$M" CustomSymbolStrField "$N$M" CustomSymbolStrFcn "$R$N$M$F" CustomSymbolStrBlkIO "rtb_$N$M" CustomSymbolStrTmpVar "$N$M" CustomSymbolStrMacro "$R$N$M" DefineNamingRule "None" ParamNamingRule "None" SignalNamingRule "None" InsertBlockDesc off SimulinkBlockComments on EnableCustomComments off InlinedPrmAccess "Literals" ReqsInCode off UseSimReservedNames off } Simulink.GRTTargetCC { $BackupClass "Simulink.TargetCC" $ObjectID 11 Version "1.6.0" Array { Type "Cell" Dimension 12 Cell "IncludeMdlTerminateFcn" Cell "CombineOutputUpdateFcns" Cell "SuppressErrorStatus" Cell "ERTCustomFileBanners" Cell "GenerateSampleERTMain" Cell "MultiInstanceERTCode" Cell "PurelyIntegerCode" Cell "SupportNonFinite" Cell "SupportComplex" Cell "SupportAbsoluteTime" Cell "SupportContinuousTime" Cell "SupportNonInlinedSFcns" PropName "DisabledProps" } TargetFcnLib "ansi_tfl_tmw.mat" TargetLibSuffix "" TargetPreCompLibLocation "" TargetFunctionLibrary "ANSI_C" UtilityFuncGeneration "Auto" ERTMultiwordTypeDef "System defined" ERTMultiwordLength 256 MultiwordLength 2048 GenerateFullHeader on GenerateSampleERTMain off GenerateTestInterfaces off IsPILTarget off ModelReferenceCompliant on ParMdlRefBuildCompliant on CompOptLevelCompliant on IncludeMdlTerminateFcn on CombineOutputUpdateFcns off SuppressErrorStatus off ERTFirstTimeCompliant off IncludeFileDelimiter "Auto" ERTCustomFileBanners off SupportAbsoluteTime on LogVarNameModifier "rt_" MatFileLogging on MultiInstanceERTCode off SupportNonFinite on SupportComplex on PurelyIntegerCode off SupportContinuousTime on SupportNonInlinedSFcns on EnableShiftOperators on ParenthesesLevel "Nominal" PortableWordSizes off ModelStepFunctionPrototypeControlCompliant off CPPClassGenCompliant off AutosarCompliant off UseMalloc off ExtMode off ExtModeStaticAlloc off ExtModeTesting off ExtModeStaticAllocSize 1000000 ExtModeTransport 0 ExtModeMexFile "ext_comm" ExtModeIntrfLevel "Level1" RTWCAPISignals off RTWCAPIParams off RTWCAPIStates off GenerateASAP2 off } PropName "Components" } } PropName "Components" } Name "Configuration" CurrentDlgPage "Solver" ConfigPrmDlgPosition " [ 360, 285, 1240, 915 ] " } PropName "ConfigurationSets" } Simulink.ConfigSet { $PropName "ActiveConfigurationSet" $ObjectID 1 } BlockDefaults { ForegroundColor "black" BackgroundColor "white" DropShadow off NamePlacement "normal" FontName "Helvetica" FontSize 14 FontWeight "normal" FontAngle "normal" ShowName on BlockRotation 0 BlockMirror off } AnnotationDefaults { HorizontalAlignment "center" VerticalAlignment "middle" ForegroundColor "black" BackgroundColor "white" DropShadow off FontName "Helvetica" FontSize 10 FontWeight "normal" FontAngle "normal" UseDisplayTextAsClickCallback off } LineDefaults { FontName "Helvetica" FontSize 9 FontWeight "normal" FontAngle "normal" } BlockParameterDefaults { Block { BlockType Scope ModelBased off TickLabels "OneTimeTick" ZoomMode "on" Grid "on" TimeRange "auto" YMin "-5" YMax "5" SaveToWorkspace off SaveName "ScopeData" LimitDataPoints on MaxDataPoints "5000" Decimation "1" SampleInput off SampleTime "-1" } Block { BlockType Sin SineType "Time based" TimeSource "Use simulation time" SampleTime "-1" VectorParams1D on } Block { BlockType Sum IconShape "rectangular" Inputs "++" CollapseMode "All dimensions" CollapseDim "1" InputSameDT on AccumDataTypeStr "Inherit: Inherit via internal rule" OutMin "[]" OutMax "[]" OutDataTypeMode "Same as first input" OutDataType "fixdt(1,16,0)" OutScaling "[]" OutDataTypeStr "Inherit: Same as first input" LockScale off RndMeth "Floor" SaturateOnIntegerOverflow on SampleTime "-1" } Block { BlockType ToWorkspace VariableName "simulink_output" MaxDataPoints "1000" Decimation "1" SampleTime "0" FixptAsFi off } Block { BlockType UniformRandomNumber Minimum "-1" Maximum "1" Seed "0" SampleTime "-1" VectorParams1D on } } System { Name "IIRorder1" Location [40, 84, 1053, 733] Open on ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "99" ReportName "simulink-default.rpt" Block { BlockType Reference Name "Clock" Ports [] Position [189, 405, 239, 423] ForegroundColor "blue" SourceBlock "allblocks_alteradspbuilder2/Clock" SourceType "BaseClock AlteraBlockset" ClockPeriod "10" ClockPeriodUnit "ns" SampleTime "1" ResetLatency "0" ResetRegisterCascadeDepth "0" SimulationStartCycle "5" PhaseOffset "0" Reset "aclr" ResetType "Active Low" Export off } Block { BlockType Reference Name "Cyclone II EP2C35 DSP \nDevelopment Board" Ports [] Position [50, 440, 148, 493] ForegroundColor "blue" SourceBlock "Cyclone_II_EP2C35_alteradspbuilder2/Cyclone II EP2C35 DSP Development Board" SourceType "CycloneIIEP2C35 Configuration AlteraBlockSet" ClockPinIn "Pin_N2" GlobalResetPin "Pin_A14" device "EP2C35F672C6" } Block { BlockType Reference Name "Input x" Ports [1, 1] Position [245, 252, 310, 268] ForegroundColor "blue" SourceBlock "allblocks_alteradspbuilder2/Input" SourceType "Input AlteraBlockset" iofile "F:\\EEL5930\\lab6 IIR\\tb_IIRorder1\\IIRorder1_Input+x.salt" BusType "Signed Integer" bwl "8" bwr "0" SpecifyClock off PORTTYPE "Input" externalType "Inferred" allowFloatingPointOverride on logOutputs off Port { PortNumber 1 Name "sine+noise" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "Manual Switch" Ports [2, 1] Position [185, 182, 215, 218] SourceBlock "simulink/Signal\nRouting/Manual Switch" SourceType "Manual Switch" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" sw "1" action "0" varsize off Port { PortNumber 1 Name "input" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "Manual Switch1" Ports [2, 1] Position [135, 247, 165, 283] SourceBlock "simulink/Signal\nRouting/Manual Switch" SourceType "Manual Switch" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" sw "1" action "0" varsize off } Block { BlockType Reference Name "Output y" Ports [1, 1] Position [847, 240, 863, 305] BlockRotation 270 ForegroundColor "blue" SourceBlock "allblocks_alteradspbuilder2/Output" SourceType "Output AlteraBlockset" iofile "F:\\EEL5930\\lab6 IIR\\tb_IIRorder1\\IIRorder1_Output+y.capture" BusType "Signed Integer" bwl "8" bwr "0" externalType "Inferred" PORTTYPE "Output" allowFloatingPointOverride on logOutputs off Port { PortNumber 1 Name "IIR output" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "Repeating\nSequence\nStair" Ports [0, 1] Position [45, 185, 75, 215] SourceBlock "simulink/Sources/Repeating\nSequence\nStair" SourceType "Repeating Sequence Stair" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" OutValues "[100 zeros(1, 300)].'" tsamp "-1" OutMin "[]" OutMax "[]" OutDataTypeStr "float('double')" OutputDataTypeScalingMode "Specify via dialog" OutDataType "float('double')" ConRadixGroup "Best Precision: Vector-wise" OutScaling "2^-12" LockScale off } Block { BlockType Reference Name "Resource Usage" Ports [] Position [191, 451, 308, 502] ForegroundColor "blue" SourceBlock "allblocks_alteradspbuilder2/Resource Usage" SourceType "Resource Usage AlteraBlockset" logic " < 1 %% " memory " 1 %% " dsp " 0 %% " memoryLable "RAM" dspLable "Multiplier" } Block { BlockType Scope Name "Scope" Ports [4] Position [935, 45, 1000, 175] Floating off Location [31, 223, 560, 700] Open off NumInputPorts "4" List { ListType AxesTitles axes1 "%" axes2 "%" axes3 "%" axes4 "%" } YMin "-120~-120~-120~-120" YMax "120~120~120~120" DataFormat "StructureWithTime" SampleTime "0" } Block { BlockType Reference Name "SignalCompiler" Ports [] Position [64, 363, 133, 410] ForegroundColor "blue" SourceBlock "allblocks_alteradspbuilder2/Signal Compiler" SourceType "Signal Compiler AlteraBlockset" DeviceFamily "Cyclone II" DeviceName "EP2C35F672C6" EnableSignalTap on SignalTapDepth "512" UseBoardBlock on StpUseDefaultClock on StpClock "Clock" ExportDir "C:\\Documents and Settings\\umb\\My Documents" } Block { BlockType Sin Name "Sine Wave" Ports [0, 1] Position [45, 40, 75, 70] Amplitude "100" Bias "0" Frequency "2*pi/32" Phase "0" Samples "10" Offset "0" SampleTime "1" Port { PortNumber 1 Name "sine" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Sin Name "Sine Wave1" Ports [0, 1] Position [45, 120, 75, 150] Amplitude "25" Bias "0" Frequency "12*2*pi/32" Phase "0" Samples "10" Offset "0" SampleTime "1" Port { PortNumber 1 Name "noise" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType ToWorkspace Name "To Workspace x" Position [250, 335, 310, 365] VariableName "x" MaxDataPoints "inf" SampleTime "-1" SaveFormat "Array" } Block { BlockType ToWorkspace Name "To Workspace y" Position [935, 340, 995, 370] VariableName "y" MaxDataPoints "inf" SampleTime "-1" SaveFormat "Array" } Block { BlockType UniformRandomNumber Name "Uniform Random\nNumber" Position [45, 259, 75, 291] Minimum "-30" Maximum "30" SampleTime "0" } Block { BlockType Reference Name "a[1]" Ports [1, 1] Position [536, 130, 584, 220] BlockRotation 270 ForegroundColor "blue" SourceBlock "allblocks_alteradspbuilder2/Gain" SourceType "Gain AlteraBlockset" vgain "0" BusType "Signed Fractional" bwl "1" bwr "12" pipeline "0" pipeline_display "0" allowFloatingPointOverride on logOutputs off logFile "F:\\EEL5930\\lab6 IIR\\tb_IIRorder1\\IIRorder1_a%5B1%5D.fixedpointlog" MaskValue "1" use_ena off use_aclr off lpm off } Block { BlockType Reference Name "b[0]" Ports [1, 1] Position [536, 275, 584, 360] BlockRotation 270 BlockMirror on ForegroundColor "blue" SourceBlock "allblocks_alteradspbuilder2/Gain" SourceType "Gain AlteraBlockset" vgain "0" BusType "Signed Fractional" bwl "1" bwr "12" pipeline "0" pipeline_display "0" allowFloatingPointOverride on logOutputs off logFile "F:\\EEL5930\\lab6 IIR\\tb_IIRorder1\\IIRorder1_b%5B0%5D.fixedpointlog" MaskValue "1" use_ena off use_aclr off lpm off } Block { BlockType Reference Name "b[1]" Ports [1, 1] Position [411, 275, 459, 360] BlockRotation 270 BlockMirror on ForegroundColor "blue" SourceBlock "allblocks_alteradspbuilder2/Gain" SourceType "Gain AlteraBlockset" vgain "0" BusType "Signed Fractional" bwl "1" bwr "12" pipeline "0" pipeline_display "0" allowFloatingPointOverride on logOutputs off logFile "C:\\IIRorder1_b%5B1%5D.fixedpointlog" MaskValue "1" use_ena off use_aclr off lpm off } Block { BlockType Sum Name "observed" Ports [2, 1] Position [115, 87, 145, 118] InputSameDT off OutDataTypeMode "Inherit via internal rule" OutDataType "sfix(16)" OutScaling "2^-10" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Line { Name "sine" Labels [0, 0] SrcBlock "Sine Wave" SrcPort 1 Points [0, 20; 20, 0] Branch { DstBlock "observed" DstPort 1 } Branch { Labels [2, 0] Points [10, 0; 0, -65; 780, 0; 0, 55] DstBlock "Scope" DstPort 1 } } Line { Name "input" Labels [0, 0] SrcBlock "Manual Switch" SrcPort 1 Points [-5, 0] Branch { Points [0, 30] Branch { Points [0, 120] DstBlock "To Workspace x" DstPort 1 } Branch { Points [15, 0] DstBlock "Input x" DstPort 1 } } Branch { Labels [2, 0] Points [0, -150; 670, 0; 0, 45] DstBlock "Scope" DstPort 2 } } Line { SrcBlock "observed" SrcPort 1 Points [15, 0; 0, 85] DstBlock "Manual Switch" DstPort 1 } Line { Name "noise" Labels [0, 0] SrcBlock "Sine Wave1" SrcPort 1 Points [10, 0; 0, -25] DstBlock "observed" DstPort 2 } Line { SrcBlock "Manual Switch1" SrcPort 1 Points [0, -25; -20, 0; 0, -30] DstBlock "Manual Switch" DstPort 2 } Line { SrcBlock "Repeating\nSequence\nStair" SrcPort 1 Points [25, 0; 0, 55] DstBlock "Manual Switch1" DstPort 1 } Line { SrcBlock "Uniform Random\nNumber" SrcPort 1 DstBlock "Manual Switch1" DstPort 2 } Line { Name "IIR output" Labels [2, 0] SrcBlock "Output y" SrcPort 1 Points [0, -80; 45, 0] Branch { DstBlock "Scope" DstPort 4 } Branch { Points [0, 200] DstBlock "To Workspace y" DstPort 1 } } Annotation { Name "Design name: \nDesigner: YourName\nDate:\nVersion:" Position [350, 480] HorizontalAlignment "left" DropShadow on TeXMode "on" FontName "Arial" FontWeight "bold" } } }